| PART |
Description |
Maker |
| IDT29FCT520BTSO IDT29FCT520BTSO8 IDT29FCT520T IDT2 |
MultiLevel PipeLine Register
|
IDT
|
| AS7C3364PFS36A-166TQI AS7C3364PFS32A AS7C3364PFS32 |
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 9 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 10 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 10 ns, PQFP100
DIODE ZENER SINGLE 1000mW 16Vz 15.5mA-Izt 0.05 5uA-Ir 12.2Vr DO41-GLASS 5K/REEL 64K X 36 STANDARD SRAM, 12 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 12 ns, PQFP100
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| AS7C33128PFD32_36B AS7C33128PFD36B-200TQIN AS7C331 |
Sync SRAM - 3.3V
LM397 Single General Purpose Voltage Comparator; Package: SOT-23; No of Pins: 5; Qty per Container: 1000; Container: Reel
3.3V 128K X 32/36 pipeline burst synchronous SRAM 128K X 32 STANDARD SRAM, 4 ns, PQFP100
3.3V 128K X 32/36 pipeline burst synchronous SRAM 128K X 36 STANDARD SRAM, 4 ns, PQFP100
128K X 36 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, LEAD FREE, TQFP-100
128K X 36 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, LEAD FREE, TQFP-100
3.3V 128K X 32/36 pipeline burst synchronous SRAM 128K X 32 STANDARD SRAM, 3 ns, PQFP100
3.3V 128K X 32/36 pipeline burst synchronous SRAM 128K X 32 STANDARD SRAM, 3.5 ns, PQFP100
3.3V 128K X 32/36 pipeline burst synchronous SRAM 3.3 128K的X 32/36管道爆裂同步SRAM
|
Alliance Semiconductor Corp...
ALSC[Alliance Semiconductor Corporation]
Alliance Semiconductor, Corp.
Integrated Silicon Solution, Inc.
|
| AS7C33256PFS18B AS7C33256PFS18BV.1.7 AS7C33256PFS1 |
3.3V 256K X 18 pipeline burst synchronous SRAM 3.3 256 × 18管道爆裂同步SRAM
3.3V 256K X 18 pipeline burst synchronous SRAM 256K X 18 STANDARD SRAM, 8 ns, PQFP100
Sync SRAM - 3.3V
From old datasheet system
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| IDT71T75602 IDT71T75802S100PFI8 IDT71T75802S100PF8 |
2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM
*NEW* 2.5V 512K X 36 ZBT Synchronous 2.5V I/O Pipeline SRAM
512K x 36, 1M x 18 2.5V Synchronous ZBT? SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
|
IDT
|
| MB814400C-60 MB814400C-70 |
CMOS 1 M ×4BIT
Fast Page Mode DRAM(CMOS 1 M ×4 位快速页面存取模式动态RAM)
CMOS 1 M ×4 BIT
Fast Page Mode DRAM(CMOS 1 M ×4 位快速页面存取模式动态RAM)
|
Fujitsu Limited
|
| IS61NP12832 IS61NP25618 IS61NLP12832-5B IS61NP1283 |
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 5 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 4.2 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 管道编号WAIT状态总线的SRAM
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 3.8 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 5 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 3.8 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 4.2 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 3.8 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 3.8 ns, PBGA119
|
Integrated Silicon Solu...
Integrated Silicon Solution, Inc.
|
| IDT54FCT157ATSO IDT54FCT157ATSOB IDT54FCT2157ATSO |
FAST CMOS QUAD 2-INPUT MULTIPLEXER
FAST CMOS QUAD 2-INPUT MULTIPLEXER FCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDFP16
FAST CMOS QUAD 2-INPUT MULTIPLEXER 快速CMOS四路2输入多路复用
|
IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
Integrated Device Technolog...
Integrated Device Techn...
|
| V53C16126H V53C16126HK35 V53C16126HK60 V53C16126HT |
HIGH PERFORMANCE 128K X 16 BIT FAST PAGE MODE CMOS DYNAMIC RAM
DRAM|FAST PAGE|128KX16|CMOS|SOJ|40PIN|PLASTIC 内存|快速页面| 128KX16 |的CMOS | SOJ | 40PIN |塑料
High performance 128K x 16bit fast page mode CMOS dynamic RAM
|
Mosel Vitelic Corp
Mosel Vitelic Corp
Mosel Vitelic, Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| IDT74FCT138 IDT74FCT138A IDT74FCT138AD IDT74FCT138 |
FAST CMOS 1-OF-8 DECODER WITH ENABLE 快速CMOS 1 - 8解码器，使能
CA-BAYONET 快速CMOS 1 - 8解码器，使能
FAST CMOS 1-OF-8 DECODER WITH ENABLE FCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
CAPACITOR CER CHIP 10PF 50V
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IDT
Integrated Device Technology, Inc.
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